The goal of this project is to explore how Brain-Computer Interface (BCI) devices are depicted in the media, especially news media. BCI technology is not new, but it is still very much in its infancy, with few feasible embodiments usable for practical, non-medical applications. Additionally, a majority of BCIs that are (only somewhat) feasible require dangerous invasive surgical procedures. Yet in the last year, the technology has received a higher-than-average level of press coverage. Media coverage of upcoming medical technology is not a trivial issue. Substantial research has shown that positive portrayals of novel medical technology in the media can indirectly affect patient consent to undergo treatment. Consequently, we argue that it is essential that the media reports and discusses the ethical impacts of BCIs. We aim to discover whether media coverage depicts the technology realistically, discussing its shortcomings, risks associated with its use, and ethical issues related to neural implantation. We use a research software called FACTIVA to survey and analyze the depiction of BCI technology inn English-speaking media such as news publications, radio transcripts, press releases, etc. This content analysis allows us to understand mass media values and narratives in three general ways: 1) it generates evidence to demonstrate whether there is any positively-biased and over-enthusiastic depiction of BCI in mass media; 2) it sheds light on whether there is an absence of discussion of risks and ethics associated with BCI technology; and 3) it exposes unrealistic discourse, such as wide-reaching claims of the panacean nature of BCIs (i.e. transhumanist arguments, the race against artificial intelligence, etc.). In brief, this study allows us to explore whether media misrepresentations of BCI could influence the narrative about the technology in ways that may increase the risk of harms for prospective patients and their families.

In the fabrication of integrated circuits and microscale devices a technique known as electroplating is often used to deposit thick layers of metals such as gold and copper. The electroplating process requires a conductive layer to facilitate electroplating, commonly referred to as a “seed” layer. In many cases, the seed material will not bond well with the base materials, necessitating the use of an intermediate “adhesion layer” to improve adhesion between the substrate material and the plated metal. In this project, Electron Beam Physical Vapor Deposition (EBPVD) was investigated as a means to deposit a 25nm titanium adhesion layer followed by a 300nm copper seed layer to promote the adhesion of electroplated copper to a silicon dioxide substrate. EBPVD is a process in which a collimated beam of high energy electrons is used to boil metal atoms off of a target and deposit them on a substrate. These systems operate in high vacuum to increase the mean free path of metal atoms ejected from the target surface, allowing for highly anisotropic deposition on the substrate. The stress states of EBPVD deposited seed layers and electroplated wafers were also observed as residual stress can adversely affect the performance of active circuitry that IPDs are bonded to. The deposition of this seed layer, followed by electroplating of copper, is but one step in the fabrication of prototype signal filtering devices for mobile applications. These micrometer scale inductors and capacitors, referred to as “Integrated Passive Devices,” are built directly atop silicon wafers, with the intent of eliminating the need for larger surface mounted signal filtering devices in applications where working volume is at a premium, such as in mobile phones and tablets. We hope our research will allow for production of higher quality prototypes and accelerate development of this emerging technology. 

Etching is one of the critical process steps in the fabrication of micro- and nano-scaled devices. Prior to etching, a pattern, usually defined in a temporary photo-sensitive polymer mask material called photoresist, is transferred onto a silicon wafer. One way to etch material, is through the use of plasma. Inductively Coupled Plasma (ICP), is distinct for its coil that shapes plasma and DC bias coupling for directionality. The machine has high etch rates and is used to etch oxide. Specifically for this project ICP-F (Fluorine) has been used. During etching, a photoresist reticulation problem has occurred. With this reticulation, features on the wafer are degraded, when reticulation is wide spread, the whole wafer must be stripped and restarted. This problem affects the speed and quality of production of wafers. In attempts to fix this problem, different variables such as the DC bias, chuck temperature, He backing, and RF power are monitored. Furthermore, the effects of varying pre-etch conditions, such as wafer bakes and different wait times, are examined to determine if there is a correlation between moisture in the photoresist film and resist reticulation or if the issues are predominately related to the etching system. Different inspection steps are made to ensure the quality of the etch, such as visual inspections and measurements of etch depths. These inspection steps concludes how much reticulation has occurred and what it has affected. ICP-F etching is just one step of the process in of fabrication of micrometer scale inductors and capacitors directly on the top of silicon wafers referred to as Integrated Passive Devices (IPD). This process decreases the amount of space used and increases the bandwidth of radio frequency (RF) analog filtering and the speed of digital information transfers. 

An Inductively Coupled Plasma fluorine (ICP-F) reactor is used to anisotropically etch silicon dioxide with octafluorocyclobutane (C4F8) and argon (Ar) gas. Microelectromechanical system (MEMS) and microelectronics applications require several micron wide features with high-resolution and precision features made on silicon wafers. The ICP-F is a fundamental of the pattern transfer process called a damascene process where a precision pattern is formed and then filled with metal and planarized to remove excess metal and leave the intended pattern. This step of the damascene process consists of lithographic resist patterning and subsequent plasma etching of the underlying material. In this work, C4F8 plasma with Ar additives are used to etch silicon dioxide to create patterns in the oxide that will later be used molds for copper electroplating. In this design, the ICP-F must have a consistent etch rate with high selectivity to achieve constant depth for the copper layer with high resolution patterns. Variables such as DC bias, Ar flow, and O2 flow were optimized to achieve a repeatable etch rate. Furthermore, wafer stress was measured at every step in the process as the varying stress of the IPD could adversely affect the electronic circuits that the IPDs are connected to. Compared to Discrete Surface Mount Devices (SMD), IPDs allow for high-density trench capacitors, Metal-Insulator-Metal Capacitors, and high-Quality inductors which are enabled by ICP-F technology. In addition, new radio frequency (RF) circuits for 5G applications are employing the use of Integrated Passive Devices (IPDs) for making RF filters.